TS-SMARC

The NXP i.MX95 is a premium applications processor that supports high-throughput edge computing and machine learning acceleration with unparalleled security, real-time determinism, and power efficiency. The TS-SMARC translates this processing power into the industry-standard SMARC (Smart Mobility ARChitecture) form factor, separating the complex processing engine from your application-specific I/O carrier board to reduce engineering risk and time-to-market.

The SoC architecture is built with a heterogeneous multicore design: up to six Arm Cortex-A55 cores for heavy Linux application workloads, a low-power Cortex-M7 for deterministic real-time processing, and a Cortex-M33 functional safety island compliant with ISO 26262 ASIL-B and IEC 61508 SIL-2 standards. Combined with a highly efficient eIQ® Neutron NPU, the TS-SMARC boosts edge computing capabilities for advanced industrial anomaly detection and machine vision without active cooling. The processor targets industrial automation, autonomous mobile robots (AMRs), medical devices, and heavy-duty IoT gateways.

Rugged and Reliable

Each component on the TS-SMARC has been carefully chosen to ensure reliable operation in the field. Data is reliably stored in the onboard eMMC 5.1 flash, which can be factory-configured in pSLC mode for applications requiring extreme write endurance. Mission-critical data loaded into the high-speed LPDDR5 memory is protected by Inline Error-Correcting Code (ECC) to prevent soft memory errors.

The TS-SMARC's highly efficient design allows it to run cool without a heat sink in a completely fanless enclosure. Utilizing the highly proven 314-pin MXM 3.0 edge connector, the TS-SMARC can withstand high shock and vibration environments. Even with all Cortex-A55 cores tasked to their maximum throughput, the system can operate at a true industrial wide temperature range of -40 °C to 85 °C. When paired with a compatible embeddedTS carrier board, the module seamlessly supports our TS-SILO™ power reserve solution, allowing up to 30 seconds of hold-up power for graceful OS shutdown to entirely avoid filesystem corruption during unexpected power loss.

Industrial Connectivity and TSN

The TS-SMARC acts as the centralized nervous system for next-generation industrial I/O. Routed directly through the 314-pin edge connector, the module exposes two Gigabit Ethernet ports featuring hardware-native Time-Sensitive Networking (TSN) and IEEE 1588 Precision Time Protocol (PTP) for deterministic synchronization in multi-axis control and factory automation.

For high-speed peripheral expansion and sensor integration, the module provides up to 2x PCIe Gen 3 lanes, USB 3.0 Type-C (with PHY), and standard industrial buses including 2x CAN-FD, multiple UARTs, I2C, and SPI. This broad support ensures drop-in compatibility with legacy automation infrastructure, modern 5G cellular modems, and Wi-Fi 6/6E modules

Hardware Security

The TS-SMARC embeds hardware-based security directly into the silicon. Featuring the integrated NXP EdgeLock® Secure Enclave, the module supports a hardware root-of-trust, encrypted secure boot, tamper detection, and secure key storage.

Core Specifications

• CPU
  
• Architecture: ARM 64-bit
• Part Number: NXP i.MX95
• CPU Cores: Up to 8 (6x Cortex-A55 @ 1.8 GHz, 1x Cortex-M7 @ 800 MHz, 1x Cortex-M33 @ 333 MHz)
• Neural Processing Unit: NXP eIQ® Neutron NPU (2.0 TOPS)

Storage & Memory

• RAM: 2 GB to 16 GB LPDDR5 (with Inline ECC)
  
• Flash: 8 GB to 64 GB eMMC 5.1 (Optional pSLC configuration)
  
• Secondary Flash: 128 MB Octal SPI NOR Flash

General I/O (Via MXM3 Connector)

• GPIO Pins: Up to 85x (Configurable)
• Serial Interfaces: 4x UART (Carrier logic determines RS-232/RS-485/RS-422)
• I2C Ports: 4x
• SPI Ports: 2x
• USB Ports: 1x USB 3.0, 4x USB 2.0 Host/OTG
• PCI Express Bus: 2x PCIe Gen 3 (1-lane)

Physical & Environmental

• Form Factor: SMARC 2.1.1 Short Module
• Connector: 314-pin MXM 3.0 (0.5mm pitch)
• Width: 82.0 mm
• Length: 50.0 mm