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24 12-bit ADC ChannelsLifecycle: Fully Developed | Released: April 2008 | RoHS Compliant
The TS-ADC24 is an 8-bit (16-bit in Arm® core compatible mode) PC/104 peripheral board (standard format) that provides 24 12-bit ADC (analog to digital converter) channels.
- Fast throughput rate at 2msps
- Low power consumption at 12mW
- Offers simultaneous conversion/read without pipeline delays
- Software examples and drivers included
No minimum order quantity on standard products.
The TS-ADC24 is an 8-bit (16-bit in Arm®-based core compatibility mode) PC/104 peripheral board (standard format) that provides 24 12-bit ADC (analog to digital converter) channels with internal 512x16bit RAM-FIFO for data acquisition and analog applications.
The TS-ADC24 features two AD7266 chips with a sampling rate up to 2msps (mega samples per second). Each ADC chip provides 12 ADC channels, 12-bit wide each, which can be configured as 12 single ended channels or 6 differential channels. Each chip can take 2 samples at a time, allowing the board to simultaneously read 4 channels. 16 of the ADC channels are brought out using rugged removable screw terminal connectors. In addition, all the ADC channels can be accessed via two standard 26-pin jumper headers.
Other AD7266 features include:
- Dual 12-bit, 3-channel ADC
- Fast throughput rate: 2msps
- Specified for VDD of 2.7V to 5.25V
- Low power: 12mW max at 1.5msps with 3V supplies
- 30mW max at 2msps with 5V supplies
- On-chip reference: Vref=2.5V DC
- Voltage input: 0 to +Vref or 0 to +2xVref
- Simultaneous conversion/read
- No pipeline delays
There are 4 separate jumper selectable I/O decode addresses, allowing up to 4 cards in a single system. The TS-ADC24 is a RoHS compliant board and the form-factor is standard PC/104. This product operates in extended industrial temperature range (-40°C to 85°C) by default.
The TS-ADC24 is compatible with both Arm-based and X86 Single Board Computers. The Arm® core compatible jumper (JP3) allows 16-bit access through the 64-pin PC/104 connector using an Arm-based SBC. Other products will make use of 8-bit PC/104 bus cycles with the jumper OFF.
The internal FIFO allows the application to read a full block of 512 samples using 16-bit or 8-bit PC/104 bus cycles. Application timing requirements are met using an internal buffer to store the ADC data as it is acquired. The application can be interrupted once new data is available for reading. Also, the board can be programmed to periodically read samples and store data in the FIFO. A Linux driver that handles the internal configuration and reading mechanism is available.
For further information regarding software support for this product, please refer to the manual or contact embeddedTS.
Detailed Feature List
- Two AD7266 ADC chips
- 24 channels 12-bit ADC
- Sampling rate up to 2msps
- Single ended or differential channels
- Takes 4 samples simultaneously
- Internal 512 x 16bit RAM-FIFO
- Jumper selectable I/O and IRQ
- PC/104 Dimensions 3.6 x 3.8 inches
- Linux drivers available
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embeddedTS provides complete documentation for our mature products, including manuals, schematics, mechanical drawings, etc. The most recent documentation files are always made available through our website. If you don't find the documentation you are looking for, contact support for more information. Also, please make sure to visit our Embedded Systems Support webpage, and our official documentation.
Third Party Documentation
From the Blog:
|Fanless Temperature Range||-40 ° to 85 °C|
|TS-ADC24||PC/104 Peripheral with 24 channels of 12-bit ADC and 64-pin PC/104 connector||Pricing|